Researchers from Tokyo Tech have successfully overcome the difficulty of producing nanowires directly on silicon substrates for the development of the following generation of electronics. The development of next-generation spintronics will result in quicker and more effective memory storage systems for computers.
The demand for better and quicker electronics and computers is constantly increasing as our globe modernizes more quickly than before. A new technology called spintronics employs an electron’s spin as well as its charge state to encode data, resulting in a faster and more effective system overall.
Ferromagnetic nanowires with high coercivity (resistance to changes in magnetization) are required to realize the potential of spintronics. Especially L10-ordered (a type of crystal structure) cobalt-platinum (CoPt) nanowires.
Conventional methods for creating L10-ordered nanowires include annealing, which involves heating a crystal substrate to improve the material’s physical and chemical properties, lithography, which transfers a pattern to the surface, and etching, which involves chemically removing layers.
The creation of spintronic devices would be greatly enhanced if nanowires were directly fabricated onto the silicon substrate, eliminating the need for etching. However, due to internal tensions in the wire, directly produced nanowires have a tendency to fragment into droplets when they are heated.
The internal stresses on the nanostructure here induce the L10-ordering. This is a different mechanism than in previous studies. We are hopeful that this discovery will open up a new field of research called ‘nanostructure-induced materials science and engineering.’
Professor Yutaka Majima
Recently, a team of researchers led by Professor Yutaka Majima from the Tokyo Institute of Technology have found a solution to the problem. The team reported a new fabrication process to make L10-ordered CoPt nanowires on silicon/silicon dioxide (Si/SiO2) substrates.
Talking about their research, published in Nanoscale Advances, Prof. Majima says, “Our nanostructure-induced ordering method allows the direct fabrication of ultrafine L10-ordered CoPt nanowires with the narrow widths of 30nm scale required for spintronics. This fabrication method could further be applied to other L10-ordered ferromagnetic materials such as iron-platinum and iron-palladium compounds.”
In order to create a stencil for the nanowires, the researchers in this study first coated a Si/SiO2 substrate with a substance known as a “resist,” then subjected it to electron beam lithography and evaporation. Then then deposited a multilayer of CoPt on the substrate.
The deposited sampled were then ‘lifted-off’, leaving behind CoPt nanowires. Then, high temperature annealing of these nanowires was applied. Several characterisation techniques were used by the researchers to further investigate the created nanowires.
They found that the nanowires took on L10-ordering during the annealing process. At the extremely short 10 nm scale curvature radii of the nanowires, atomic interdiffusion, surface diffusion, and extremely high internal tension caused this change. They also found that the nanowires exhibited a large coercivity of 10 kiloOersteds (kOe).
According to Prof. Majima, “The internal stresses on the nanostructure here induce the L10-ordering. This is a different mechanism than in previous studies. We are hopeful that this discovery will open up a new field of research called ‘nanostructure-induced materials science and engineering.’”
The innovative production method’s broad applicability and ease of use will undoubtedly have a substantial impact on spintronics research.
